National Institute of Informatics



Site Map

Contact












TOP
GREETING
RESEARCH
SERVICES
EDUCATION
RESULTS
ABOUT NII






教員・研究員公募



Introduction of researcher

【Name】
Miura   Kenichi

【Doctoral degrees】

1973, Ph.D., Computer Science, University of Illinois

【Affiliation / Position】

Director, Center for Grid Research and Development

Professor, Information Systems Architecture Science Research Division

【Telephone】 +81-3-4212-2549, +81-3-4212-2900 (NAREGI)
【Facsimile】 +81-3-4212-2802
【E-mail】 kenmiura@nii.ac.jp
【Personal home page】 http://research.nii.ac.jp/~...
【JST ReaD】
【Research fields】
High-end Computing, Grid
【Research Title】
NONE
【Research Introduce】
NONE


Outline of current research
Education
Career
Awards
Teaching positions
Courses
Academic societies
Public activities
Most important publications (Top 10)
Most important activities (Top 10)
Refereed publications, published books
Patents / softwares / other works
Other publications
Speeches and oral presentations
Teaching experience
Other activities in the past
Competitive research funds


【Outline of current research】


【Education】


【Career】


【Awards】


【Teaching positions】


【Courses】


【Academic societies】


【Public activities】

NONE

【Most important publications (Top 10)】

  1. Overview of Japanese National Reserch Grid Institute (NAREGI) Project, Kenichi Miura, Fijitsu Scientific and technical Journal, Vol 40 No.2, pp.196-204(2004)

  2. Overview of Japanese National Reserch Grid Institute (NAREGI) Project, Kenichi Miura, Fijitsu Scientific and technical Journal, Vol 40 No.2, pp.196-204(2004)

  3. CFD Applications and Performance on Fujitsu Vector-Parallel Processing Systems: VPP300E/VPP700E (Invited Talk), Kenichi Miura, Proc. 10th International Conference on Parallel CFD: Developments and Applications of Parallel Technology, 29-36, May 11-14, 1998 ,Hsinchu, Taiwan

  4. CFD Applications and Performance on Fujitsu Vector-Parallel Processing Systems: VPP300E/VPP700E (Invited Talk), Kenichi Miura, Proc. 10th International Conference on Parallel CFD: Developments and Applications of Parallel Technology, 29-36, May 11-14, 1998 ,Hsinchu, Taiwan

  5. Vector-Parallel Processing and Fujitsu’s Approach to High Performance Computing: VPP300/VPP700 Systems (Invited paper) Kenichi Miura,Proc. The 5th International School/Symposium for Space Simulations, pp.448-450 (1997)

  6. Vector-Parallel Processing and Fujitsu’s Approach to High Performance Computing: VPP300/VPP700 Systems (Invited paper) Kenichi Miura,Proc. The 5th International School/Symposium for Space Simulations, pp.448-450 (1997)

  7. A Vector-Parallel Implementation and Statistical Analysis of the Bucket Sort on a Vector-Parallel Distributed Memory System: Lessons Learned in the Integer Sort NAS Parallel Benchmark, Bracy Elton, Kenichi Miura Proc. The 7th SIAM Conference on Parallel Processing for Scientific Computing, pp.782-783 (1995)

  8. VPP500 Supercomputing System (Invited Paper), Kenichi Miura, Proc. SUPERCOMPUTER ’93, pp.46-52 (1993)

  9. A Vector-Parallel Implementation and Statistical Analysis of the Bucket Sort on a Vector-Parallel Distributed Memory System: Lessons Learned in the Integer Sort NAS Parallel Benchmark, Bracy Elton, Kenichi Miura Proc. The 7th SIAM Conference on Parallel Processing for Scientific Computing, pp.782-783 (1995)

  10. Supercomputing in Japan ( Invited Paper ), Kenichi Miura,IFIP INFORMATION PROCESSING 86, pp.557-564 (1986)

【Most important activities (Top 10)】





  1. The National Research Grid Initiative (NAREGI) (Keynote Address), The 8th Global Grid Forum (GGF-8), June 24-27, 2003, Seattle Washington, USA

  2. The National Research Grid Initiative (NAREGI) (Keynote Address), The 8th Global Grid Forum (GGF-8), June 24-27, 2003, Seattle Washington, USA

  3. Industry and Grids: A View from Japan (Invited Talk), Kenichi Miura, The 4th Global Grid Forum (GGF-4), Feb.17-22,2002, Toronto Canada

  4. National Research Grid Initiative Project and Surrounding HPC Environment (Keynote Address), Kenichi Miura, The 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2003), May 12-15, 2003 Tokyo Japan

  5. National Research Grid Initiative Project and Surrounding HPC Environment (Keynote Address), Kenichi Miura, The 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2003), May 12-15, 2003 Tokyo Japan

  6. Vector-Parallel Processing Approach to High performance Computing (Keynote address), Kenichi Miura 4th International Conference on High Performance Computing, IEEE Computer Society, Dec.18-21, 1997, Bangalore India

  7. Industry and Grids: A View from Japan (Invited Talk), Kenichi Miura, The 4th Global Grid Forum (GGF-4), Feb.17-22,2002, Toronto Canada

  8. Vector-Parallel Processing Approach to High performance Computing (Keynote address), Kenichi Miura 4th International Conference on High Performance Computing, IEEE Computer Society, Dec.18-21, 1997, Bangalore India

【Refereed publications, published books】

  1. Overview of Japanese National Reserch Grid Institute (NAREGI) Project, Kenichi Miura, Fijitsu Scientific and technical Journal, Vol 40 No.2, pp.196-204(2004)

  2. Overview of Japanese National Reserch Grid Institute (NAREGI) Project, Kenichi Miura, Fijitsu Scientific and technical Journal, Vol 40 No.2, pp.196-204(2004)

  3. Special Issue on Grid Computing, Japanese Computational Grid Research Project:NAREAGI, Proceedings of the IEEE March 2005 Vol 93 No.3 PP522-533 (2005)

  4. Hardware Performance of the VPP500 Parallel Supercomputer Akira Nodomi, Masayuki Ikeda, Moriyuki Takamura and Kenichi Miura Proc. NATO Symposium on High Performance Computing: Technology, Method and Applications, pp.103-120 (1995)

  5. Hardware Performance of the VPP500 Parallel Supercomputer Akira Nodomi, Masayuki Ikeda, Moriyuki Takamura and Kenichi Miura Proc. NATO Symposium on High Performance Computing: Technology, Method and Applications, pp.103-120 (1995)

  6. A High Performance Linear Equation Solver on the VPP500 Parallel Supercomputer Makoto Nakanishi, Hiroshi Ina and Kenichi Miura Proc. Supercomputing Conference (SC’94), pp.803-810 (1994)

  7. A High Performance Linear Equation Solver on the VPP500 Parallel Supercomputer Makoto Nakanishi, Hiroshi Ina and Kenichi Miura Proc. Supercomputing Conference (SC’94), pp.803-810 (1994)

  8. The Scalar Processor of the VPP500 Parllel Supercomputer Nakashima, Y., Kitamura, T., Tamura, H. Takiuchi, M. and Miura, K. Proc. 9th ACM International Conference on Supercomputing(ICS’94) pp.348-356 (1994)

  9. Numerical Study of Flow and Heat Transfer for Circular Jet Impingement on the Bottom of a Cylindrical Cavity Gavali,S., Karaki,K., Miura,K. and Motegi, M. Proc. ASME Topics in Heat Transfer, HTD-Vol206-2, pp.119-124 (1993)

  10. The Scalar Processor of the VPP500 Parllel Supercomputer Nakashima, Y., Kitamura, T., Tamura, H. Takiuchi, M. and Miura, K. Proc. 9th ACM International Conference on Supercomputing(ICS’94) pp.348-356 (1994)

  11. Numerical Study of Flow and Heat Transfer for Circular Jet Impingement on the Bottom of a Cylindrical Cavity Gavali,S., Karaki,K., Miura,K. and Motegi, M. Proc. ASME Topics in Heat Transfer, HTD-Vol206-2, pp.119-124 (1993)

  12. VP2000 Series Dual Scalar and Quadruple Scalar Models Supercomputer Systems --- A New Concept in Vector Processing Kenichi Miura, Hiroshi Nagakura and Hiroshi Tamura Proc. COMPCON Spring ’91, pp.294-302 (1991)

  13. VP2000 Series Dual Scalar and Quadruple Scalar Models Supercomputer Systems --- A New Concept in Vector Processing Kenichi Miura, Hiroshi Nagakura and Hiroshi Tamura Proc. COMPCON Spring ’91, pp.294-302 (1991)

  14. Vectorization and Parallelization of Transport Monte Carlo Simulation Codes Kenichi Miura Proc. Winter Simulation Conference, pp.722-730 (1990)

  15. Vectorization and Parallelization of Transport Monte Carlo Simulation Codes Kenichi Miura Proc. Winter Simulation Conference, pp.722-730 (1990)

  16. Vectorization and Parallelization of Transport Monte Carlo Simulation Codes Kenichi Miura NATO ASI Series F62,pp.307-324 (1990)

  17. Vectorization and Parallelization of Transport Monte Carlo Simulation Codes Kenichi Miura NATO ASI Series F62,pp.307-324 (1990)

  18. A 6 x 320-MHz 1024-Channel FFT Cross-Spectrum Analyzer for Radio Astronomy Chikada, Y., Ishiguro, M., Hirabayashi, H., Morimoto, M., Morita, K., Kanazawa, T.,Iwashita, H., Nakazima,K., Ishikawa, S., Takahashi, T., Handa, K., Kasuga, T., Okumura, S., Miyazawa, T., Nakazuru,T., Miura, K., and Nagasawa, S. Proc. IEEE, Vol.75, No.9, pp.1203-1210 (1987)

  19. Tradeoffs in Granularity and Parallelization for a Monte Carlo Shower Simulation Code Kenichi Miura, Robert G. Babb Parallel Computing 8, pp.91-100 (1987)

  20. A 6 x 320-MHz 1024-Channel FFT Cross-Spectrum Analyzer for Radio Astronomy Chikada, Y., Ishiguro, M., Hirabayashi, H., Morimoto, M., Morita, K., Kanazawa, T.,Iwashita, H., Nakazima,K., Ishikawa, S., Takahashi, T., Handa, K., Kasuga, T., Okumura, S., Miyazawa, T., Nakazuru,T., Miura, K., and Nagasawa, S. Proc. IEEE, Vol.75, No.9, pp.1203-1210 (1987)

  21. Tradeoffs in Granularity and Parallelization for a Monte Carlo Shower Simulation Code Kenichi Miura, Robert G. Babb Parallel Computing 8, pp.91-100 (1987)

  22. EGS4V: Vectorization of the Monte Carlo Cascade Shower Simulation Code EGS4 Kenichi Miura Computer Physics Communications 45, pp.127-136 (1987)

  23. Supervector Performance without Toil:Fortran Implemented Vector Algorithms on the VP-100/200 Toshihiko Matsuura, Kenichi Miura and Mitsuhiro Makino Computer Physics Communications 37,pp.101-107 (1985)

  24. Supervector Performance without Toil:Fortran Implemented Vector Algorithms on the VP-100/200 Toshihiko Matsuura, Kenichi Miura and Mitsuhiro Makino Computer Physics Communications 37,pp.101-107 (1985)

  25. EGS4V: Vectorization of the Monte Carlo Cascade Shower Simulation Code EGS4 Kenichi Miura Computer Physics Communications 45, pp.127-136 (1987)

【Patents / softwares / other works 】

  1. U.S. Patent 4,438,427 March 20, 1984 Decoder and Method Utilizing Partial and Redundant Decoding

  2. U.S. Patent 4,438,427 March 20, 1984 Decoder and Method Utilizing Partial and Redundant Decoding

  3. U.S. patent 4,218,747 August 19, 1980 Arithmetic and Logic Unit Using basic Cells

  4. U.S. Patent 4,224,680 September 23, 1980 Parity Prediction Circuit for Adder/Counter

  5. U.S. Patent 4,224,680 September 23, 1980 Parity Prediction Circuit for Adder/Counter

  6. U.S. Patent 4,163,211 July 31, 1979 Tree-type Combinatorial Logic Circuit

  7. U.S. patent 4,218,747 August 19, 1980 Arithmetic and Logic Unit Using basic Cells

  8. U.S. Patent 4,163,211 July 31, 1979 Tree-type Combinatorial Logic Circuit

【Other publications】

  1. CFD Applications and Performance on Fujitsu Vector-Parallel Processing Systems: VPP300E/VPP700E (Invited Talk), Kenichi Miura, Proc. 10th International Conference on Parallel CFD: Developments and Applications of Parallel Technology, 29-36, May 11-14, 1998 ,Hsinchu, Taiwan

  2. CFD Applications and Performance on Fujitsu Vector-Parallel Processing Systems: VPP300E/VPP700E (Invited Talk), Kenichi Miura, Proc. 10th International Conference on Parallel CFD: Developments and Applications of Parallel Technology, 29-36, May 11-14, 1998 ,Hsinchu, Taiwan

  3. Vector-Parallel Processing and Fujitsu’s Approach to High Performance Computing: VPP300/VPP700 Systems (Invited paper) Kenichi Miura,Proc. The 5th International School/Symposium for Space Simulations, pp.448-450 (1997)

  4. Vector-Parallel Processing and Fujitsu’s Approach to High Performance Computing: VPP300/VPP700 Systems (Invited paper) Kenichi Miura,Proc. The 5th International School/Symposium for Space Simulations, pp.448-450 (1997)

  5. A Vector-Parallel Implementation and Statistical Analysis of the Bucket Sort on a Vector-Parallel Distributed Memory System: Lessons Learned in the Integer Sort NAS Parallel Benchmark, Bracy Elton, Kenichi Miura Proc. The 7th SIAM Conference on Parallel Processing for Scientific Computing, pp.782-783 (1995)

  6. VPP500 Supercomputing System (Invited Paper), Kenichi Miura, Proc. SUPERCOMPUTER ’93, pp.46-52 (1993)

  7. A Vector-Parallel Implementation and Statistical Analysis of the Bucket Sort on a Vector-Parallel Distributed Memory System: Lessons Learned in the Integer Sort NAS Parallel Benchmark, Bracy Elton, Kenichi Miura Proc. The 7th SIAM Conference on Parallel Processing for Scientific Computing, pp.782-783 (1995)

  8. Supercomputing in Japan ( Invited Paper ), Kenichi Miura,IFIP INFORMATION PROCESSING 86, pp.557-564 (1986)

  9. VPP500 Supercomputing System (Invited Paper), Kenichi Miura, Proc. SUPERCOMPUTER ’93, pp.46-52 (1993)

  10. Supercomputing in Japan ( Invited Paper ), Kenichi Miura,IFIP INFORMATION PROCESSING 86, pp.557-564 (1986)

【Speeches and oral presentations】

  1. The National Research Grid Initiative (NAREGI) (Keynote Address), The 8th Global Grid Forum (GGF-8), June 24-27, 2003, Seattle Washington, USA

  2. The National Research Grid Initiative (NAREGI) (Keynote Address), The 8th Global Grid Forum (GGF-8), June 24-27, 2003, Seattle Washington, USA

  3. Industry and Grids: A View from Japan (Invited Talk), Kenichi Miura, The 4th Global Grid Forum (GGF-4), Feb.17-22,2002, Toronto Canada

  4. National Research Grid Initiative Project and Surrounding HPC Environment (Keynote Address), Kenichi Miura, The 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2003), May 12-15, 2003 Tokyo Japan

  5. National Research Grid Initiative Project and Surrounding HPC Environment (Keynote Address), Kenichi Miura, The 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2003), May 12-15, 2003 Tokyo Japan

  6. Vector-Parallel Processing Approach to High performance Computing (Keynote address), Kenichi Miura 4th International Conference on High Performance Computing, IEEE Computer Society, Dec.18-21, 1997, Bangalore India

  7. Industry and Grids: A View from Japan (Invited Talk), Kenichi Miura, The 4th Global Grid Forum (GGF-4), Feb.17-22,2002, Toronto Canada

  8. Vector-Parallel Processing Approach to High performance Computing (Keynote address), Kenichi Miura 4th International Conference on High Performance Computing, IEEE Computer Society, Dec.18-21, 1997, Bangalore India

【Teaching experience】



【Other activities in the past】



【Competitive research funds】

  (1) Grant in aid for scientific research

  (2) Public funding

  • NONE
  (3) Others

  • NONE



RESEARCH




このページのTOPへ







National Institute of Informatics 2-1-2 Hitotsubashi, Chiyoda-ku, Tokyo 101-8430Copyright(C) National Institute of Informatics